The present invention relates to a method for fabricating a semiconductor device and, more particularly, to an improvement in element isolation techniques of an LSI (large scale integrated circuit).
As an isolation technique of a semiconductor integrated circuit, a technique for facilitating higher packaging density and for facilitating a manufacturing process therefor is known wherein an isolation region comprises an oxide film which is formed by the selective oxidation technique. According to this method, an active region is surrounded by an oxide film, so that self-alignment is possible in base diffusion or the like, and a part required for mask alignment in the conventional method is unnecesary. For this reason, high packaging density in some degree may be achieved. However, with this method, since a thermally oxidized film is selectively buried in a silicon substrate, the substrate is distorted to a considerable extent. This degrades the electrical characteristics of the element and imposes strict limits on the structure, configuration, film thickness and selective oxidation conditions of the antioxidant mask and even the selection of the material for the substrate. This is discussed in various literature such as IEDM "High Pressure Oxidation for Isolation of High Speed Bipolar Devices", 1979, pp. 340 to 343.
In the conventional element isolation technique utilizing insulators, the field oxidation time is long, which adversely affects the diffusion and redistribution of impurities in the channel stopper. For example, when the diffusion in the transverse direction is too great, the effective channel width of the MOS transistor is reduced and the drain junction capacitance increases. This presents a big problem for achieving a high speed device.
Furthermore, since the antioxidant mask comprises a bi-layered structure consisting of a silicon nitride film and an oxide film, a bird's beak undercuts the silicon nitride film to a depth of 1 .mu.m or more. Therefore, formation of an element isolation film of less than 2 .mu.m width has been difficult. This is discussed, for example, in J.E.C.S., "Bird's Beak Configuration and Elimination of Gate Oxide Thinning Produced during Selection Oxidation", 1980, pp. 216 to 222.
In order to overcome the defects of the element isolation technique utilizing selective oxidation, Japanese Laid-Open Patent application No. 50-11792 discloses a method according to which a mask is formed on a semiconductor substrate, a groove of a predetermined depth is formed by etching the substrate, an insulating film is formed by the CVD process to such a thickness that the groove is filled, and the mask is removed by etching or the like to simultaneously remove the insulating film on the mask, thereby leaving the insulating film only in the groove to provide an element isolation layer. This method has various advantages. Since the processing may be performed at a relatively low temperature, the substrate may not be adversely affected (the distortion due to high temperatures may be avoided), the bird's beak is not formed and transverse diffusion of the impurity layer as the channel stopper may be prevented. However, as shown in FIG. 1, an insulating film 3 as an element isolation layer in a groove 2 formed on a semiconductor substrate 1 cannot be formed completely flat, and gaps 4 are often formed between the insulating film 3 and the side walls of the groove 2.
The gaps 4 not only impair the element isolation function of the insulating film 3 but also impose problems in the subsequent steps for formation of the semiconductor element.